about summary refs log tree commit diff
path: root/pkgs/development/compilers/gcc/4.8/bug-61801.patch
diff options
context:
space:
mode:
Diffstat (limited to 'pkgs/development/compilers/gcc/4.8/bug-61801.patch')
-rw-r--r--pkgs/development/compilers/gcc/4.8/bug-61801.patch15
1 files changed, 15 insertions, 0 deletions
diff --git a/pkgs/development/compilers/gcc/4.8/bug-61801.patch b/pkgs/development/compilers/gcc/4.8/bug-61801.patch
new file mode 100644
index 000000000000..3d87e007813b
--- /dev/null
+++ b/pkgs/development/compilers/gcc/4.8/bug-61801.patch
@@ -0,0 +1,15 @@
+https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61801
+https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=212740
+
+--- a/gcc/sched-deps.c	2014/07/17 07:48:49	212739
++++ b/gcc/sched-deps.c	2014/07/17 07:49:44	212740
+@@ -2744,7 +2744,8 @@
+ 	   Consider for instance a volatile asm that changes the fpu rounding
+ 	   mode.  An insn should not be moved across this even if it only uses
+ 	   pseudo-regs because it might give an incorrectly rounded result.  */
+-	if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
++	if ((code != ASM_OPERANDS || MEM_VOLATILE_P (x))
++	    && !DEBUG_INSN_P (insn))
+ 	  reg_pending_barrier = TRUE_BARRIER;
+ 
+ 	/* For all ASM_OPERANDS, we must traverse the vector of input operands.