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author | Alyssa Ross <hi@alyssa.is> | 2019-09-08 00:46:04 +0000 |
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committer | Alyssa Ross <hi@alyssa.is> | 2019-09-16 22:13:21 +0000 |
commit | afcf2d55332c5c01c2d989e9d010577d257cb6cc (patch) | |
tree | e1c816a271686b014a6403bcad7c57dd2ee4d9c7 /nixpkgs/pkgs/os-specific/linux/kernel | |
parent | 175b9acd282aaf65b5f354ea6e95c1348fe3daa3 (diff) | |
parent | 4e60699fa727e4a0f9a3e78948012f86da32cfef (diff) | |
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Merge commit '4e60699fa727e4a0f9a3e78948012f86da32cfef'
Diffstat (limited to 'nixpkgs/pkgs/os-specific/linux/kernel')
9 files changed, 300 insertions, 27 deletions
diff --git a/nixpkgs/pkgs/os-specific/linux/kernel/common-config.nix b/nixpkgs/pkgs/os-specific/linux/kernel/common-config.nix index b392dc853d35..42230fe31ecd 100644 --- a/nixpkgs/pkgs/os-specific/linux/kernel/common-config.nix +++ b/nixpkgs/pkgs/os-specific/linux/kernel/common-config.nix @@ -123,6 +123,7 @@ let IPV6_FOU_TUNNEL = whenAtLeast "4.7" module; NET_CLS_BPF = whenAtLeast "4.4" module; NET_ACT_BPF = whenAtLeast "4.4" module; + NET_SCHED = yes; L2TP_V3 = yes; L2TP_IP = module; L2TP_ETH = module; diff --git a/nixpkgs/pkgs/os-specific/linux/kernel/generic.nix b/nixpkgs/pkgs/os-specific/linux/kernel/generic.nix index 527811c2b8d6..2c01dcb97312 100644 --- a/nixpkgs/pkgs/os-specific/linux/kernel/generic.nix +++ b/nixpkgs/pkgs/os-specific/linux/kernel/generic.nix @@ -93,7 +93,8 @@ let configfile = stdenv.mkDerivation { inherit ignoreConfigErrors autoModules preferBuiltin kernelArch; - name = "linux-config-${version}"; + pname = "linux-config"; + inherit version; generateConfig = ./generate-config.pl; diff --git a/nixpkgs/pkgs/os-specific/linux/kernel/linux-4.14.nix b/nixpkgs/pkgs/os-specific/linux/kernel/linux-4.14.nix index 38078ea67282..a3b77ee8d96c 100644 --- a/nixpkgs/pkgs/os-specific/linux/kernel/linux-4.14.nix +++ b/nixpkgs/pkgs/os-specific/linux/kernel/linux-4.14.nix @@ -3,7 +3,7 @@ with stdenv.lib; buildLinux (args // rec { - version = "4.14.140"; + version = "4.14.141"; # modDirVersion needs to be x.y.z, will automatically add .0 if needed modDirVersion = if (modDirVersionArg == null) then concatStrings (intersperse "." (take 3 (splitString "." "${version}.0"))) else modDirVersionArg; @@ -13,6 +13,6 @@ buildLinux (args // rec { src = fetchurl { url = "mirror://kernel/linux/kernel/v4.x/linux-${version}.tar.xz"; - sha256 = "1wmx7xgm21dk1hvrq14sxh3c4304284sgxr4vngg4pki2ljyspkr"; + sha256 = "05rs411rw10hhnfzvaxmcik3pq20i1i05shvvra4bv164f0z1f8b"; }; } // (args.argsOverride or {})) diff --git a/nixpkgs/pkgs/os-specific/linux/kernel/linux-4.19.nix b/nixpkgs/pkgs/os-specific/linux/kernel/linux-4.19.nix index 1e3d14c140d1..fb25fbb7ddcd 100644 --- a/nixpkgs/pkgs/os-specific/linux/kernel/linux-4.19.nix +++ b/nixpkgs/pkgs/os-specific/linux/kernel/linux-4.19.nix @@ -3,7 +3,7 @@ with stdenv.lib; buildLinux (args // rec { - version = "4.19.68"; + version = "4.19.69"; # modDirVersion needs to be x.y.z, will automatically add .0 if needed modDirVersion = if (modDirVersionArg == null) then concatStrings (intersperse "." (take 3 (splitString "." "${version}.0"))) else modDirVersionArg; @@ -13,6 +13,6 @@ buildLinux (args // rec { src = fetchurl { url = "mirror://kernel/linux/kernel/v4.x/linux-${version}.tar.xz"; - sha256 = "0ax04sivi1lsx01m3abi16w6d0jd3qvwzzq2zbn8q2lca505k1wi"; + sha256 = "11yrw8ixd5ni9rlpndqsz2ihx6k8qaf35a1lf164lkhaa85pd4f0"; }; } // (args.argsOverride or {})) diff --git a/nixpkgs/pkgs/os-specific/linux/kernel/linux-5.1.nix b/nixpkgs/pkgs/os-specific/linux/kernel/linux-5.1.nix deleted file mode 100644 index ad3b292656e9..000000000000 --- a/nixpkgs/pkgs/os-specific/linux/kernel/linux-5.1.nix +++ /dev/null @@ -1,18 +0,0 @@ -{ stdenv, buildPackages, fetchurl, perl, buildLinux, modDirVersionArg ? null, ... } @ args: - -with stdenv.lib; - -buildLinux (args // rec { - version = "5.1.21"; - - # modDirVersion needs to be x.y.z, will automatically add .0 if needed - modDirVersion = if (modDirVersionArg == null) then concatStrings (intersperse "." (take 3 (splitString "." "${version}.0"))) else modDirVersionArg; - - # branchVersion needs to be x.y - extraMeta.branch = concatStrings (intersperse "." (take 2 (splitString "." version))); - - src = fetchurl { - url = "mirror://kernel/linux/kernel/v5.x/linux-${version}.tar.xz"; - sha256 = "1xj1wfhjz2s5a8j6zx3fsd7rrrkvw5waszzylf2gn3ag6615yjan"; - }; -} // (args.argsOverride or {})) diff --git a/nixpkgs/pkgs/os-specific/linux/kernel/linux-5.2.nix b/nixpkgs/pkgs/os-specific/linux/kernel/linux-5.2.nix index 6f6de115ad0b..bf28ac53df09 100644 --- a/nixpkgs/pkgs/os-specific/linux/kernel/linux-5.2.nix +++ b/nixpkgs/pkgs/os-specific/linux/kernel/linux-5.2.nix @@ -3,7 +3,7 @@ with stdenv.lib; buildLinux (args // rec { - version = "5.2.10"; + version = "5.2.11"; # modDirVersion needs to be x.y.z, will automatically add .0 if needed modDirVersion = if (modDirVersionArg == null) then concatStrings (intersperse "." (take 3 (splitString "." "${version}.0"))) else modDirVersionArg; @@ -13,6 +13,6 @@ buildLinux (args // rec { src = fetchurl { url = "mirror://kernel/linux/kernel/v5.x/linux-${version}.tar.xz"; - sha256 = "0jgw7gj71i9kf4prbdi9h791ngxf24nr90302glnsa9aghwc95k0"; + sha256 = "1y9kn1zny3xpmbi5an3g7hbzywnycys8chfaw6laij1xk4gq6ahc"; }; } // (args.argsOverride or {})) diff --git a/nixpkgs/pkgs/os-specific/linux/kernel/linux-libre.nix b/nixpkgs/pkgs/os-specific/linux/kernel/linux-libre.nix index 5eb050cbdff9..e4a4e40f370c 100644 --- a/nixpkgs/pkgs/os-specific/linux/kernel/linux-libre.nix +++ b/nixpkgs/pkgs/os-specific/linux/kernel/linux-libre.nix @@ -4,8 +4,8 @@ # Update this if linux_latest-libre fails to build. # $ curl https://www.fsfla.org/svn/fsfla/software/linux-libre/releases/tags/ | grep -Eo 'Revision [0-9]+' - rev = "16330"; - sha256 = "1d7rsq2m6lp1784cgdg95aspgrnzxm6q9dxqalxja5cac8n6p11y"; + rev = "16604"; + sha256 = "0d2dh52zv073zr74ilspy0fy3ivys5pq32j7fljs4fwi2bcljf51"; } , ... }: diff --git a/nixpkgs/pkgs/os-specific/linux/kernel/mac-nvme-t2.patch b/nixpkgs/pkgs/os-specific/linux/kernel/mac-nvme-t2.patch new file mode 100644 index 000000000000..2f1fa6a0daec --- /dev/null +++ b/nixpkgs/pkgs/os-specific/linux/kernel/mac-nvme-t2.patch @@ -0,0 +1,283 @@ +diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c +index dd10cf78f2d3..8f006638452b 100644 +--- a/drivers/nvme/host/pci.c ++++ b/drivers/nvme/host/pci.c +@@ -28,8 +28,8 @@ + #include "trace.h" + #include "nvme.h" + +-#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) +-#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) ++#define SQ_SIZE(q) ((q)->q_depth * sizeof(struct nvme_command)) ++#define CQ_SIZE(q) ((q)->q_depth * sizeof(struct nvme_completion)) + + #define SGES_PER_PAGE (PAGE_SIZE / sizeof(struct nvme_sgl_desc)) + +@@ -1344,16 +1344,16 @@ static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved) + + static void nvme_free_queue(struct nvme_queue *nvmeq) + { +- dma_free_coherent(nvmeq->dev->dev, CQ_SIZE(nvmeq->q_depth), ++ dma_free_coherent(nvmeq->dev->dev, CQ_SIZE(nvmeq), + (void *)nvmeq->cqes, nvmeq->cq_dma_addr); + if (!nvmeq->sq_cmds) + return; + + if (test_and_clear_bit(NVMEQ_SQ_CMB, &nvmeq->flags)) { + pci_free_p2pmem(to_pci_dev(nvmeq->dev->dev), +- nvmeq->sq_cmds, SQ_SIZE(nvmeq->q_depth)); ++ nvmeq->sq_cmds, SQ_SIZE(nvmeq)); + } else { +- dma_free_coherent(nvmeq->dev->dev, SQ_SIZE(nvmeq->q_depth), ++ dma_free_coherent(nvmeq->dev->dev, SQ_SIZE(nvmeq), + nvmeq->sq_cmds, nvmeq->sq_dma_addr); + } + } +@@ -1433,12 +1433,12 @@ static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues, + } + + static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, +- int qid, int depth) ++ int qid) + { + struct pci_dev *pdev = to_pci_dev(dev->dev); + + if (qid && dev->cmb_use_sqes && (dev->cmbsz & NVME_CMBSZ_SQS)) { +- nvmeq->sq_cmds = pci_alloc_p2pmem(pdev, SQ_SIZE(depth)); ++ nvmeq->sq_cmds = pci_alloc_p2pmem(pdev, SQ_SIZE(nvmeq)); + if (nvmeq->sq_cmds) { + nvmeq->sq_dma_addr = pci_p2pmem_virt_to_bus(pdev, + nvmeq->sq_cmds); +@@ -1447,11 +1447,11 @@ static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, + return 0; + } + +- pci_free_p2pmem(pdev, nvmeq->sq_cmds, SQ_SIZE(depth)); ++ pci_free_p2pmem(pdev, nvmeq->sq_cmds, SQ_SIZE(nvmeq)); + } + } + +- nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth), ++ nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(nvmeq), + &nvmeq->sq_dma_addr, GFP_KERNEL); + if (!nvmeq->sq_cmds) + return -ENOMEM; +@@ -1465,12 +1465,13 @@ static int nvme_alloc_queue(struct nvme_dev *dev, int qid, int depth) + if (dev->ctrl.queue_count > qid) + return 0; + +- nvmeq->cqes = dma_alloc_coherent(dev->dev, CQ_SIZE(depth), ++ nvmeq->q_depth = depth; ++ nvmeq->cqes = dma_alloc_coherent(dev->dev, CQ_SIZE(nvmeq), + &nvmeq->cq_dma_addr, GFP_KERNEL); + if (!nvmeq->cqes) + goto free_nvmeq; + +- if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth)) ++ if (nvme_alloc_sq_cmds(dev, nvmeq, qid)) + goto free_cqdma; + + nvmeq->dev = dev; +@@ -1479,15 +1480,14 @@ static int nvme_alloc_queue(struct nvme_dev *dev, int qid, int depth) + nvmeq->cq_head = 0; + nvmeq->cq_phase = 1; + nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; +- nvmeq->q_depth = depth; + nvmeq->qid = qid; + dev->ctrl.queue_count++; + + return 0; + + free_cqdma: +- dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes, +- nvmeq->cq_dma_addr); ++ dma_free_coherent(dev->dev, CQ_SIZE(nvmeq), (void *)nvmeq->cqes, ++ nvmeq->cq_dma_addr); + free_nvmeq: + return -ENOMEM; + } +@@ -1515,7 +1515,7 @@ static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid) + nvmeq->cq_head = 0; + nvmeq->cq_phase = 1; + nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; +- memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth)); ++ memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq)); + nvme_dbbuf_init(dev, nvmeq, qid); + dev->online_queues++; + wmb(); /* ensure the first interrupt sees the initialization */ +diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c +index cc09b81fc7f4..716ebe87a2b8 100644 +--- a/drivers/nvme/host/core.c ++++ b/drivers/nvme/host/core.c +@@ -1986,6 +1986,7 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap) + ctrl->ctrl_config = NVME_CC_CSS_NVM; + ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; + ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; ++ /* Use default IOSQES. We'll update it later if needed */ + ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; + ctrl->ctrl_config |= NVME_CC_ENABLE; + +@@ -2698,6 +2699,30 @@ int nvme_init_identify(struct nvme_ctrl *ctrl) + ctrl->hmmin = le32_to_cpu(id->hmmin); + ctrl->hmminds = le32_to_cpu(id->hmminds); + ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); ++ ++ /* Grab required IO queue size */ ++ ctrl->iosqes = id->sqes & 0xf; ++ if (ctrl->iosqes < NVME_NVM_IOSQES) { ++ dev_err(ctrl->device, ++ "unsupported required IO queue size %d\n", ctrl->iosqes); ++ ret = -EINVAL; ++ goto out_free; ++ } ++ /* ++ * If our IO queue size isn't the default, update the setting ++ * in CC:IOSQES. ++ */ ++ if (ctrl->iosqes != NVME_NVM_IOSQES) { ++ ctrl->ctrl_config &= ~(0xfu << NVME_CC_IOSQES_SHIFT); ++ ctrl->ctrl_config |= ctrl->iosqes << NVME_CC_IOSQES_SHIFT; ++ ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ++ ctrl->ctrl_config); ++ if (ret) { ++ dev_err(ctrl->device, ++ "error updating CC register\n"); ++ goto out_free; ++ } ++ } + } + + ret = nvme_mpath_init(ctrl, id); +diff --git a/drivers/nvme/host/nvme.h b/drivers/nvme/host/nvme.h +index 716a876119c8..34ef35fcd8a5 100644 +--- a/drivers/nvme/host/nvme.h ++++ b/drivers/nvme/host/nvme.h +@@ -244,6 +244,7 @@ struct nvme_ctrl { + u32 hmmin; + u32 hmminds; + u16 hmmaxd; ++ u8 iosqes; + + /* Fabrics only */ + u16 sqsize; +diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c +index 8f006638452b..54b35ea4af88 100644 +--- a/drivers/nvme/host/pci.c ++++ b/drivers/nvme/host/pci.c +@@ -28,7 +28,7 @@ + #include "trace.h" + #include "nvme.h" + +-#define SQ_SIZE(q) ((q)->q_depth * sizeof(struct nvme_command)) ++#define SQ_SIZE(q) ((q)->q_depth << (q)->sqes) + #define CQ_SIZE(q) ((q)->q_depth * sizeof(struct nvme_completion)) + + #define SGES_PER_PAGE (PAGE_SIZE / sizeof(struct nvme_sgl_desc)) +@@ -162,7 +162,7 @@ static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl) + struct nvme_queue { + struct nvme_dev *dev; + spinlock_t sq_lock; +- struct nvme_command *sq_cmds; ++ void *sq_cmds; + /* only used for poll queues: */ + spinlock_t cq_poll_lock ____cacheline_aligned_in_smp; + volatile struct nvme_completion *cqes; +@@ -178,6 +178,7 @@ struct nvme_queue { + u16 last_cq_head; + u16 qid; + u8 cq_phase; ++ u8 sqes; + unsigned long flags; + #define NVMEQ_ENABLED 0 + #define NVMEQ_SQ_CMB 1 +@@ -488,7 +489,8 @@ static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd, + bool write_sq) + { + spin_lock(&nvmeq->sq_lock); +- memcpy(&nvmeq->sq_cmds[nvmeq->sq_tail], cmd, sizeof(*cmd)); ++ memcpy(nvmeq->sq_cmds + (nvmeq->sq_tail << nvmeq->sqes), ++ cmd, sizeof(*cmd)); + if (++nvmeq->sq_tail == nvmeq->q_depth) + nvmeq->sq_tail = 0; + nvme_write_sq_db(nvmeq, write_sq); +@@ -1465,6 +1467,7 @@ static int nvme_alloc_queue(struct nvme_dev *dev, int qid, int depth) + if (dev->ctrl.queue_count > qid) + return 0; + ++ nvmeq->sqes = qid ? dev->ctrl.iosqes : NVME_NVM_ADMSQES; + nvmeq->q_depth = depth; + nvmeq->cqes = dma_alloc_coherent(dev->dev, CQ_SIZE(nvmeq), + &nvmeq->cq_dma_addr, GFP_KERNEL); +diff --git a/include/linux/nvme.h b/include/linux/nvme.h +index 01aa6a6c241d..7af18965fb57 100644 +--- a/include/linux/nvme.h ++++ b/include/linux/nvme.h +@@ -141,6 +141,7 @@ enum { + * (In bytes and specified as a power of two (2^n)). + */ + #define NVME_NVM_IOSQES 6 ++#define NVME_NVM_ADMSQES 6 + #define NVME_NVM_IOCQES 4 + + enum { +diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c +index 716ebe87a2b8..480ea24d8cf4 100644 +--- a/drivers/nvme/host/core.c ++++ b/drivers/nvme/host/core.c +@@ -2701,7 +2701,10 @@ int nvme_init_identify(struct nvme_ctrl *ctrl) + ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); + + /* Grab required IO queue size */ +- ctrl->iosqes = id->sqes & 0xf; ++ if (ctrl->quirks & NVME_QUIRK_128_BYTES_SQES) ++ ctrl->iosqes = 7; ++ else ++ ctrl->iosqes = id->sqes & 0xf; + if (ctrl->iosqes < NVME_NVM_IOSQES) { + dev_err(ctrl->device, + "unsupported required IO queue size %d\n", ctrl->iosqes); +diff --git a/drivers/nvme/host/nvme.h b/drivers/nvme/host/nvme.h +index 34ef35fcd8a5..b2a78d08b984 100644 +--- a/drivers/nvme/host/nvme.h ++++ b/drivers/nvme/host/nvme.h +@@ -92,6 +92,16 @@ enum nvme_quirks { + * Broken Write Zeroes. + */ + NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), ++ ++ /* ++ * Use only one interrupt vector for all queues ++ */ ++ NVME_QUIRK_SINGLE_VECTOR = (1 << 10), ++ ++ /* ++ * Use non-standard 128 bytes SQEs. ++ */ ++ NVME_QUIRK_128_BYTES_SQES = (1 << 11), + }; + + /* +diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c +index 54b35ea4af88..ab2358137419 100644 +--- a/drivers/nvme/host/pci.c ++++ b/drivers/nvme/host/pci.c +@@ -2080,6 +2080,9 @@ static int nvme_setup_irqs(struct nvme_dev *dev, unsigned int nr_io_queues) + dev->io_queues[HCTX_TYPE_DEFAULT] = 1; + dev->io_queues[HCTX_TYPE_READ] = 0; + ++ if (dev->ctrl.quirks & NVME_QUIRK_SINGLE_VECTOR) ++ irq_queues = 1; ++ + return pci_alloc_irq_vectors_affinity(pdev, 1, irq_queues, + PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY, &affd); + } +@@ -3037,6 +3040,9 @@ static const struct pci_device_id nvme_id_table[] = { + { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, + { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) }, + { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2005), ++ .driver_data = NVME_QUIRK_SINGLE_VECTOR | ++ NVME_QUIRK_128_BYTES_SQES }, + { 0, } + }; + MODULE_DEVICE_TABLE(pci, nvme_id_table); diff --git a/nixpkgs/pkgs/os-specific/linux/kernel/patches.nix b/nixpkgs/pkgs/os-specific/linux/kernel/patches.nix index e941cd4ea413..edca017b3c70 100644 --- a/nixpkgs/pkgs/os-specific/linux/kernel/patches.nix +++ b/nixpkgs/pkgs/os-specific/linux/kernel/patches.nix @@ -62,4 +62,10 @@ rec { name = "export_kernel_fpu_functions"; patch = ./export_kernel_fpu_functions.patch; }; + + # patches from https://lkml.org/lkml/2019/7/15/1748 + mac_nvme_t2 = rec { + name = "mac_nvme_t2"; + patch = ./mac-nvme-t2.patch; + }; } |