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| author | Alyssa Ross <hi@alyssa.is> | 2019-01-07 16:23:40 +0000 |
|---|---|---|
| committer | Alyssa Ross <hi@alyssa.is> | 2019-01-07 16:24:02 +0000 |
| commit | 8c0790eb6095ef59a9623596f5794d250b95c699 (patch) | |
| tree | 4801e46054b433e786e15d030b6cab991d8a6724 /modules/nixos-hardware/common/cpu/intel | |
| parent | 36f56d99fa0a0765c9f1de4a5f17a9b05830c3f2 (diff) | |
| parent | 99cdc883064ac5a1b9e189d3500a809616e79765 (diff) | |
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Add 'modules/nixos-hardware/' from commit '99cdc883064ac5a1b9e189d3500a809616e79765'
git-subtree-dir: modules/nixos-hardware git-subtree-mainline: 36f56d99fa0a0765c9f1de4a5f17a9b05830c3f2 git-subtree-split: 99cdc883064ac5a1b9e189d3500a809616e79765
Diffstat (limited to 'modules/nixos-hardware/common/cpu/intel')
3 files changed, 31 insertions, 0 deletions
diff --git a/modules/nixos-hardware/common/cpu/intel/default.nix b/modules/nixos-hardware/common/cpu/intel/default.nix new file mode 100644 index 000000000000..7f2223c72e40 --- /dev/null +++ b/modules/nixos-hardware/common/cpu/intel/default.nix @@ -0,0 +1,14 @@ +{ config, lib, pkgs, ... }: + +{ + boot.initrd.kernelModules = [ "i915" ]; + + hardware.cpu.intel.updateMicrocode = + lib.mkDefault config.hardware.enableRedistributableFirmware; + + hardware.opengl.extraPackages = with pkgs; [ + vaapiIntel + vaapiVdpau + libvdpau-va-gl + ]; +} diff --git a/modules/nixos-hardware/common/cpu/intel/kaby-lake/default.nix b/modules/nixos-hardware/common/cpu/intel/kaby-lake/default.nix new file mode 100644 index 000000000000..e6a2d1ce8e6e --- /dev/null +++ b/modules/nixos-hardware/common/cpu/intel/kaby-lake/default.nix @@ -0,0 +1,8 @@ +{ + imports = [ ../. ]; + + boot.kernelParams = [ + "i915.enable_fbc=1" + "i915.enable_psr=2" + ]; +} diff --git a/modules/nixos-hardware/common/cpu/intel/sandy-bridge/default.nix b/modules/nixos-hardware/common/cpu/intel/sandy-bridge/default.nix new file mode 100644 index 000000000000..682815cee473 --- /dev/null +++ b/modules/nixos-hardware/common/cpu/intel/sandy-bridge/default.nix @@ -0,0 +1,9 @@ +{ + imports = [ ../. ]; + + # Enables RC6, RC6p and RC6pp. + # Last two are only available on Sandy Bridge CPUs (circa 2011). + boot.kernelParams = [ + "i915.enable_rc6=7" + ]; +} |